Von Neumann architecture
Overview
The Von Neumann architecture—also known as the Von Neumann model or Princeton architecture—is a computer architecture based on a 1945 description by the mathematician and physicist John von Neumann and others in the First Draft of a Report on the EDVAC. This describes a design architecture for an electronic digital computer with parts consisting of a processing unit containing an arithmetic logic unit and processor registers, a control unit containing an instruction register and program counter, a memory to store both data and instructions, external mass storage, and input and output mechanisms. The design of a Von Neumann architecture is simpler than the more modern Harvard architecture which is also a stored-program system but has one dedicated set of address and data buses for reading data from and writing data to memory, and another set of address and data buses for fetching instructions.
History
The Von Neumann architecture was first published by John von Neumann and his colleagues in a report titled First Draft of a Report on the EDVAC in 1945. This report outlined the design of a stored-program computer that came to be known as the Von Neumann architecture. The architecture was a significant departure from earlier computing models, particularly the Electronic Numerical Integrator and Computer (ENIAC), which relied on punched card inputs and manual setting of switches to control its operations.
Components
The Von Neumann architecture consists of five main components: the arithmetic logic unit (ALU), the control unit, the memory, the input and output mechanisms, and the bus system to allow for data transfer between components.
Arithmetic Logic Unit (ALU)
The Arithmetic Logic Unit (ALU) is the mathematical heart of the computer. It performs arithmetic and logical operations on the data it receives from the memory or input devices.
Control Unit
The control unit directs the operation of the processor. It tells the computer's memory, arithmetic/logic unit and input and output devices how to respond to the instructions that have been sent to the processor.
Memory
The memory stores both data and instructions. In a Von Neumann architecture, the same memory and bus are used to store both data and instructions that run the program.
Input and Output Mechanisms
Input devices are designed to provide data to the computer system, while output devices present the results of its computations. In a Von Neumann architecture, the input and output devices are treated as equal and are connected directly to the system bus.
Bus System
The bus system in a Von Neumann architecture is used to transfer data between different components of the computer. It is a subsystem that transfers data or power between computer components inside a computer or between computers.
Von Neumann Bottleneck
One of the primary criticisms of the Von Neumann architecture is the Von Neumann bottleneck, a limitation on throughput caused by the standard bus architecture used in the Von Neumann model. This bottleneck is a result of the fact that the entire computer system must wait while the memory fetches data. This problem has been mitigated in some modern architectures by using parallel buses and data caches.
Modern Implementations
Despite its limitations, the Von Neumann architecture is still the basis for most computer architectures today. Modern computers, however, often incorporate elements of the Harvard architecture to overcome the limitations of the Von Neumann bottleneck. These include separate instruction and data caches, which are a form of modified Harvard architecture.